64 bit data type for ARM register











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I am using RVDS60 64 bit compiler to compile my test code for ARM A76 core. While executing the following statement, I can observe 64 bit data getting updated in X0 register in my debugger window:



  MRS X0, S3_6_c15_c1_1 ; 

  RET

  ENDP


But when it returns from the assembly language to my C code, the data in the register is only having the lower 32 bit and upper 32 bit is getting chopped. I am using 'volatile unsigned long long int' as the data type.



   volatile unsigned long long int ildata0, ildata1, ildata2,data0,data1;

   unsigned int entry = 0;



    data0 = tlb_l1_ram_data_register_0A0(entry);


Data0 is always reading 0 though in X0 I can see 64 bit data with upper 32 bits holding the data. What might be the reason ?






assembly arm disassembly







share|improve this question






















  • Are you using an ARM Cortex-A? If so, add the cortex-a tag.
    – Fiddling Bits
    Nov 9 at 19:00












  • I found -mcpu=cortex-a53 in the compile log
    – user3565150
    Nov 9 at 19:24






  • 1




    Did you declare tlb_l1_ram_data_register_0A0 as a function that returns unsigned long long? What do you see when you single-step the asm from your ret back into compiler-generated code? (GDB stepi, and use layout asm / layout reg for asm debugging of the compiler output.)
    – Peter Cordes
    Nov 10 at 1:43










  • Thanks, declaration of function resolves the issue
    – user3565150
    Nov 11 at 20:09















up vote
-1
down vote

favorite












I am using RVDS60 64 bit compiler to compile my test code for ARM A76 core. While executing the following statement, I can observe 64 bit data getting updated in X0 register in my debugger window:



  MRS X0, S3_6_c15_c1_1 ; 

  RET

  ENDP


But when it returns from the assembly language to my C code, the data in the register is only having the lower 32 bit and upper 32 bit is getting chopped. I am using 'volatile unsigned long long int' as the data type.



   volatile unsigned long long int ildata0, ildata1, ildata2,data0,data1;

   unsigned int entry = 0;



    data0 = tlb_l1_ram_data_register_0A0(entry);


Data0 is always reading 0 though in X0 I can see 64 bit data with upper 32 bits holding the data. What might be the reason ?






assembly arm disassembly







share|improve this question






















  • Are you using an ARM Cortex-A? If so, add the cortex-a tag.
    – Fiddling Bits
    Nov 9 at 19:00












  • I found -mcpu=cortex-a53 in the compile log
    – user3565150
    Nov 9 at 19:24






  • 1




    Did you declare tlb_l1_ram_data_register_0A0 as a function that returns unsigned long long? What do you see when you single-step the asm from your ret back into compiler-generated code? (GDB stepi, and use layout asm / layout reg for asm debugging of the compiler output.)
    – Peter Cordes
    Nov 10 at 1:43










  • Thanks, declaration of function resolves the issue
    – user3565150
    Nov 11 at 20:09













up vote
-1
down vote

favorite









up vote
-1
down vote

favorite











I am using RVDS60 64 bit compiler to compile my test code for ARM A76 core. While executing the following statement, I can observe 64 bit data getting updated in X0 register in my debugger window:



  MRS X0, S3_6_c15_c1_1 ; 

  RET

  ENDP


But when it returns from the assembly language to my C code, the data in the register is only having the lower 32 bit and upper 32 bit is getting chopped. I am using 'volatile unsigned long long int' as the data type.



   volatile unsigned long long int ildata0, ildata1, ildata2,data0,data1;

   unsigned int entry = 0;



    data0 = tlb_l1_ram_data_register_0A0(entry);


Data0 is always reading 0 though in X0 I can see 64 bit data with upper 32 bits holding the data. What might be the reason ?






assembly arm disassembly







share|improve this question













I am using RVDS60 64 bit compiler to compile my test code for ARM A76 core. While executing the following statement, I can observe 64 bit data getting updated in X0 register in my debugger window:



  MRS X0, S3_6_c15_c1_1 ; 

  RET

  ENDP


But when it returns from the assembly language to my C code, the data in the register is only having the lower 32 bit and upper 32 bit is getting chopped. I am using 'volatile unsigned long long int' as the data type.



   volatile unsigned long long int ildata0, ildata1, ildata2,data0,data1;

   unsigned int entry = 0;



    data0 = tlb_l1_ram_data_register_0A0(entry);


Data0 is always reading 0 though in X0 I can see 64 bit data with upper 32 bits holding the data. What might be the reason ?






assembly arm disassembly




assembly arm disassembly






share|improve this question













share|improve this question











share|improve this question




share|improve this question










asked Nov 9 at 18:56









user3565150

3721629




3721629












  • Are you using an ARM Cortex-A? If so, add the cortex-a tag.
    – Fiddling Bits
    Nov 9 at 19:00












  • I found -mcpu=cortex-a53 in the compile log
    – user3565150
    Nov 9 at 19:24






  • 1




    Did you declare tlb_l1_ram_data_register_0A0 as a function that returns unsigned long long? What do you see when you single-step the asm from your ret back into compiler-generated code? (GDB stepi, and use layout asm / layout reg for asm debugging of the compiler output.)
    – Peter Cordes
    Nov 10 at 1:43










  • Thanks, declaration of function resolves the issue
    – user3565150
    Nov 11 at 20:09


















  • Are you using an ARM Cortex-A? If so, add the cortex-a tag.
    – Fiddling Bits
    Nov 9 at 19:00












  • I found -mcpu=cortex-a53 in the compile log
    – user3565150
    Nov 9 at 19:24






  • 1




    Did you declare tlb_l1_ram_data_register_0A0 as a function that returns unsigned long long? What do you see when you single-step the asm from your ret back into compiler-generated code? (GDB stepi, and use layout asm / layout reg for asm debugging of the compiler output.)
    – Peter Cordes
    Nov 10 at 1:43










  • Thanks, declaration of function resolves the issue
    – user3565150
    Nov 11 at 20:09
















Are you using an ARM Cortex-A? If so, add the cortex-a tag.
– Fiddling Bits
Nov 9 at 19:00






Are you using an ARM Cortex-A? If so, add the cortex-a tag.
– Fiddling Bits
Nov 9 at 19:00














I found -mcpu=cortex-a53 in the compile log
– user3565150
Nov 9 at 19:24




I found -mcpu=cortex-a53 in the compile log
– user3565150
Nov 9 at 19:24




1




1




Did you declare tlb_l1_ram_data_register_0A0 as a function that returns unsigned long long? What do you see when you single-step the asm from your ret back into compiler-generated code? (GDB stepi, and use layout asm / layout reg for asm debugging of the compiler output.)
– Peter Cordes
Nov 10 at 1:43




Did you declare tlb_l1_ram_data_register_0A0 as a function that returns unsigned long long? What do you see when you single-step the asm from your ret back into compiler-generated code? (GDB stepi, and use layout asm / layout reg for asm debugging of the compiler output.)
– Peter Cordes
Nov 10 at 1:43












Thanks, declaration of function resolves the issue
– user3565150
Nov 11 at 20:09




Thanks, declaration of function resolves the issue
– user3565150
Nov 11 at 20:09

















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